• DocumentCode
    435009
  • Title

    On an analysis approach for an improved linear overlay control

  • Author

    Mueller, Thomas

  • Author_Institution
    itemic AG, Dresden, Germany
  • Volume
    4
  • fYear
    2004
  • fDate
    14-17 Dec. 2004
  • Firstpage
    4255
  • Abstract
    Overlay control is performed using linear static models of the exposure tool with the controlled variables being the parameters of the linear exposure tool model. The CIM interface of the exposure tool also typically only offers the parameters of those linear models as the manipulated input variables. Nevertheless, the real distribution of the overlay error over the wafer surface can be nonlinear (e.g. due to processes upstream to the exposure step). While, in the past, nonlinear residuals could be tolerated and were contained well within the wide overlay specification boundaries, with shrinking feature size and ever tightening overlay budget these nonlinear residuals will become more relevant in the future. An optimization approach capable of maximizing the number of overlay targets that will reside within some inner specification limits that are relevant to chip performance is described. The key benefit of this approach consists in providing a smaller overlay within the wafer centre region. As the wafer centre is also less vulnerable to other process problems induced by upstream (like CMP) or downstream (like etch) processes, this approach has the potential to yield more high performance dies even with the linear control methodology, exposure tools, and tool interfaces used throughout the fabs. It´s not necessary that the exposure tool or it´s CIM interface is able to handle nonlinear manipulated variables in order for this approach to be deployed.
  • Keywords
    computer integrated manufacturing; optimised production technology; semiconductor device manufacture; CIM interface; chip performance; exposure tool; high performance dies; linear overlay control; linear static models; nonlinear manipulated variables; nonlinear residuals; optimization; overlay error; wafer centre region; wafer surface; Circuits; Computer errors; Computer integrated manufacturing; Dies; Etching; Input variables; Lithography; Manufacturing processes; Semiconductor device modeling; Semiconductor devices;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Decision and Control, 2004. CDC. 43rd IEEE Conference on
  • ISSN
    0191-2216
  • Print_ISBN
    0-7803-8682-5
  • Type

    conf

  • DOI
    10.1109/CDC.2004.1429420
  • Filename
    1429420