DocumentCode :
435519
Title :
VLSI architecture of Rayleigh fading simulator based on IIR filter and polyphase interpolator
Author :
Sattar, Fouz ; Mufti, Muid
Author_Institution :
Dept. of Comput. Eng., Univ. of Eng. & Technol., Taxila, Pakistan
fYear :
2004
fDate :
6-8 Dec. 2004
Firstpage :
291
Lastpage :
294
Abstract :
This paper presents hardware design of a Rayleigh fading simulator that efficiently generates Gaussian variates with Jakes power spectral density. The architecture is based on Komninakis design consisting of a fixed IIR filter followed by a polyphase interpolator for different Doppler rates. The hardware simulator facilitates real time error performance evaluation of wireless channels in Rayleigh fading environments. It also offers the potential of improving the evaluation speed by orders of magnitude over a software based simulation.
Keywords :
IIR filters; Rayleigh channels; VLSI; digital simulation; radiocommunication; telecommunication computing; Doppler rate; IIR filter; Jakes power spectral density; Komninakis design; Rayleigh fading environments; Rayleigh fading simulator; VLSI architecture; hardware design; polyphase interpolator; real time error performance evaluation; software based simulation; wireless channels; Computational modeling; Computer architecture; Design engineering; Fading; Frequency; Hardware; IIR filters; Power engineering and energy; Rayleigh channels; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics, 2004. ICM 2004 Proceedings. The 16th International Conference on
Print_ISBN :
0-7803-8656-6
Type :
conf
DOI :
10.1109/ICM.2004.1434270
Filename :
1434270
Link To Document :
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