Dual-edge late-transition detector for testing the metastability effect in flip-flops

Author

Kalisz, Józef ; Jachna, Zbigniew

Author_Institution

Mil. Univ. of Technol., Warsaw, Poland

fYear

2004

fDate

6-8 Dec. 2004

Firstpage

780

Lastpage

782

Abstract

A method for determination of the metastability parameters W and τ of flip-flops is described. The presented late-transition detector (LTD) allows for the estimation of metastability effects appearing at both types of propagation times in flip-flops (t_pl.H and t_pHL) and calculation of two relevant measures of the mean time between failures (MTBF), which can be combined into a single value. The method is illustrated with the tests of four types of programmable logic devices. We used the PC-controlled test setup with dedicated test fixtures, HP-IB interface, and HP VEE software.

Keywords

digital integrated circuits; electronic engineering computing; flip-flops; integrated circuit testing; logic testing; peripheral interfaces; programmable logic devices; HP VEE software; HPIB interface; PC controlled test; dual edge late transition detector; electronic engineering computing; flip-flops testing; mean time between failures; metastability effect estimation; programmable logic devices; Application specific integrated circuits; Circuit testing; Clocks; Detectors; Flip-flops; Frequency synchronization; Integrated circuit measurements; Integrated circuit testing; Logic testing; Metastasis;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronics, 2004. ICM 2004 Proceedings. The 16th International Conference on

Print_ISBN

0-7803-8656-6

Type

conf

DOI

10.1109/ICM.2004.1434782

Filename

1434782