Multi-gate CMOS with fin-channel structures beyond planar CMOS scaling limits

A great deal of attention has been paid to FD-SOI and multi-gate devices because they show promise in overcoming device scaling limits. Here, many reported types of fin-channel devices are reviewed regarding their potential as technology boosters for post-CMOS scaling. This paper demonstrates that double-, triple-, and quadruple-gates have different advantages. Therefore, the device structure should be individually designed accordingly for specific applications.