DocumentCode :
435706
Title :
Multi-gate SOI MOSFET for 3D IC fabrication
Author :
Lin, Jyi-Tsong ; Huang, Jian-Han
Author_Institution :
Dept. of Electr. Eng., Nat. Sun Yat Sen Univ., Kaohsiung, Taiwan
Volume :
1
fYear :
2004
fDate :
18-21 Oct. 2004
Firstpage :
117
Abstract :
In this paper, 71nm multi-gate, cross-gate and multi-fins SOI device be used for 3D CMOS IC were successfully fabricated on a bulk wafer simultaneously rather than on a commercial SOI wafer. The buried oxide of the SOI structure was directly formed by high temperature low pressure wet oxidation and for simplicity, the recrystallized film was formed by the recrystallization of amorphous silicon using high temperature annealing. Although the yield was not good, the cross-gate devices produced shows lower leakage current, better subthreshold factor, higher Ion/Ioff ratio, and none kink effect compared to the corresponding multi-fin multi-gate devices.
Keywords :
CMOS integrated circuits; MOSFET; leakage currents; nanotechnology; oxidation; silicon-on-insulator; 3D CMOS IC; 3D IC fabrication; 71 nm; amorphous silicon; bulk wafer; buried oxide; cross-gate SOI device; high temperature annealing; kink effect; leakage current; multi-fins SOI device; multi-gate S0I MOSFET; recrystallized film; wet oxidation; Amorphous silicon; Annealing; CMOS integrated circuits; Fabrication; Leakage current; MOSFET circuits; Oxidation; Semiconductor films; Temperature; Three-dimensional integrated circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated Circuits Technology, 2004. Proceedings. 7th International Conference on
Print_ISBN :
0-7803-8511-X
Type :
conf
DOI :
10.1109/ICSICT.2004.1434967
Filename :
1434967
Link To Document :
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