Analog performance of scaled bulk and SOI MOSFETs

This paper presents a systematic study of scaled MOSFET for analog RF applications. An analog performance metric of intrinsic gain, f_T, linearity, and g_m/I_ds ratio is considered. Impact of device scaling on this performance metric has been analyzed. Our study indicates that while scaling gate length (Lg) improves various trade-offs, scaling oxide thickness (T_ox) and source/drain extension junction depth.(X_l) do not impact trade-offs significantly and they can be set by other constraints such as power supply and gate leakage currents. Also, it is shown that, even for the frequencies in the range of GHz (where AC kink effect is totally suppressed), analog performance of SOI devices is inferior to that of the bulk devices due to capacitive drain-to-body coupling and gate-workfunction engineering is essential in FDSOI devices for improving analog performance at threshold voltage compatible with the bulk technology. As gate oxide is reduced to less than 2nm, gate leakage and the reduced supply voltage can seriously affect many analog circuits such as switch-capacitor or sample and hold circuits. The effect of gate oxide scaling and gate leakage currents on sample and hold circuits is therefore discussed in detail with reference to performance parameters such as non-linearity, acquisition time and droop rate.