DocumentCode
435728
Title
Functional scaling beyond ultimate CMOS
Author
Hutchby, J.A. ; Zhirnov, V.V. ; Cavin, Ralph K. ; Bourianoff, George I.
Author_Institution
Semicond. Res. Corp., USA
Volume
1
fYear
2004
fDate
18-21 Oct. 2004
Firstpage
234
Abstract
Scaling of CMOS technology is rapidly approaching inviolate limits of size and speed determined by fundamental physics and device density determined by limits of heat dissipation. An analysis presented in this paper shows that the notion of using adiabatic computing ideas suggested by some as a means to lower energy dissipation of charge-based switches is not a viable approach.
Keywords
CMOS integrated circuits; cooling; semiconductor technology; CMOS technology; adiabatic computing; device density; energy dissipation; functional scaling; heat dissipation; switches; CMOS process; CMOS technology; Energy dissipation; Logic devices; MOSFETs; Nanoscale devices; Single electron transistors; Switches; Throughput; Tunneling;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuits Technology, 2004. Proceedings. 7th International Conference on
Print_ISBN
0-7803-8511-X
Type
conf
DOI
10.1109/ICSICT.2004.1434995
Filename
1434995
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