DocumentCode
435741
Title
Scalability and parasitic effect of UTB SOI MOSFETs with raised S/D and sunk S/D
Author
Ke, Wei ; Zhang, Shengdong ; Liu, Xiaoyan ; Han, Ruqi
Author_Institution
Inst. of Microelectron., Peking Univ., Beijing, China
Volume
1
fYear
2004
fDate
18-21 Oct. 2004
Firstpage
291
Abstract
The short channel effects, sub-threshold swing characteristics and source/drain parasitic effects of sub-50 nm ultra-thin-body (UTB) SOI MOSFETs are studied in detail with device simulator in this paper. The simulation results indicate that the UTB devices with a body of 5 nm in thickness can be scaled well down to 20 nm node and below only if short channel effects are concerned. However, the sub-50 run UTB devices with a raised source/drain suffer from a significant parasitic source/drain resistance and gate-drain/source capacitance which kill the performance improvement from device scaling. On the other hand, the parasitic effects are minimized and thereby the excellent intrinsic performances are maintained in the sunk source/drain UTB devices even with extremely scaled dimensions.
Keywords
MOSFET; digital simulation; semiconductor device models; semiconductor devices; silicon-on-insulator; 20 nm; 5 nm; SOI MOSFET; device simulator; short channel effects; source/drain parasitic effect; sub-threshold swing characteristic; ultra thin body; Contact resistance; Degradation; Immune system; MOS devices; MOSFETs; Microelectronics; Nanoscale devices; Parasitic capacitance; Scalability; Ultra large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuits Technology, 2004. Proceedings. 7th International Conference on
Print_ISBN
0-7803-8511-X
Type
conf
DOI
10.1109/ICSICT.2004.1435009
Filename
1435009
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