Title :
Integration and reliability of a manufacturable 130nm dual damascene Cu/low-k process
Author :
Lee, T.J. ; Lim, Y.K. ; Zhang, F. ; Tan, D. ; Siew, Y.K. ; Perera, C. ; Bu, X.M. ; Chong, D. ; Vigar, D. ; Sun, S.C.
Author_Institution :
Chartered Semicond. Manuf. Ltd., Singapore
Abstract :
This paper describes how a manufacturable Cu/low-k process with k=3.0 has been successfully integrated for 130nm technology node using 248nm lithography. Integration of the dual damascene dielectric stack and Cu metallization with regard to reliability improvement are explained. Yield and reliability data including electromigration (EM) and stress migration (SM) together with packaging performance demonstrate the manufacturability of the integration solution.
Keywords :
copper; dielectric materials; electromigration; integrated circuit metallisation; integrated circuit reliability; integrated circuit technology; integrated circuit yield; nanolithography; ultraviolet lithography; 130 nm; 248 nm; Cu; Cu metallization; dual damascene Cu-low-k process; dual damascene dielectric stack; electromigration; lithography; stress migration; Copper; Dielectric materials; Lithography; Manufacturing processes; Packaging; Semiconductor device manufacture; Silicon carbide; Silicon compounds; Testing; Utility programs;
Conference_Titel :
Solid-State and Integrated Circuits Technology, 2004. Proceedings. 7th International Conference on
Print_ISBN :
0-7803-8511-X
DOI :
10.1109/ICSICT.2004.1435054
