Temperature rise in low-k ULSI interconnects

In this paper, analysis to the temperature rise in three ULSI interconnect structures of 50nm node technology have been carried out by using the compact quasi-analytic model we developed. Although the error in analyzing structure I is increased to 7.7%, the results still mean much for temperature rise prediction in interconnect design. Thick interlayer is the main causes to make the heat transfer conditions of interconnect severely rugged. The investigation to the thermal conductivity of the interlayer reveals that temperature rise decays in two order exponential way and when k>0.1 w/°Cm, the temperature rise increases extremely fast. New dielectric materials with low k but relatively less porous are desired in the interconnect structure for future 45nm node technology and beyond.