DocumentCode :
435795
Title :
Finite element stress analysis of an multi-chip package by Taguchi design of experiments for package component thicknesses
Author :
Liu, Biao ; Wang, Mingxiang ; Lam, Tim Fai
Author_Institution :
Dept. of Microelectron., Soochow Univ., China
Volume :
1
fYear :
2004
fDate :
18-21 Oct. 2004
Firstpage :
611
Abstract :
Slacked multi-chip package (MCP) has been an increasingly important approach for realizing high-density 3D packaging. To accommodate multiple chips within a standard package height with adequate integrity and reliability puts stringent demands on wafer thinning technology, as well as on assembly process technology. In this work, internal stress distribution and package warpage in MCP originated from process thermal load have been systematically investigated as functions of all structure parameters by finite element analysis (FEA) and Taguchi design of experiments (DOE). It is found that top die is the easiest to crack under thermal stress. The maximum stress in this die can be effectively relieved by increasing its thickness and/or by decreasing the thickness of die attach underneath. Shear stress at each interface depends negatively on the corresponding die attach thickness, while top-surface warpage can be controlled by mould compound thickness above top die.
Keywords :
Taguchi methods; design of experiments; finite element analysis; internal stresses; multichip modules; stress analysis; thermal stress cracking; Taguchi design of experiments; assembly process technology; die attach thickness; finite element analysis; high-density 3D packaging; internal stress distribution; mould compound thickness; package component thickness; package warpage; process thermal load; shear stress; slacked multichip package; stress analysis; thermal stress; top-surface warpage; wafer thinning technology; Assembly; Finite element methods; Internal stresses; Microassembly; Packaging; Stress control; Thermal loading; Thermal stresses; Thickness control; US Department of Energy;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated Circuits Technology, 2004. Proceedings. 7th International Conference on
Print_ISBN :
0-7803-8511-X
Type :
conf
DOI :
10.1109/ICSICT.2004.1435080
Filename :
1435080
Link To Document :
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