DocumentCode
435882
Title
Interface trap generation on thin SiO2 and plasma-nitrided SiO2 gate dielectrics under static and dynamic stresses
Author
Zhu, Shiyang ; Nakajima, Anri ; Ohashi, Takuo ; Miyake, Hideharu
Author_Institution
Res. Center for Nanodevices & Syst., Hiroshima Univ., Japan
Volume
2
fYear
2004
fDate
18-21 Oct. 2004
Firstpage
828
Abstract
Interface trap generation under static and dynamic (bipolar and unipolar) oxide field stresses has been investigated using the forward-biased gate-controlled-diode (GCD) measurement on n-channel MOSFETs. It is observed that the interface traps are generated more efficiently under dynamic stress than under static stress, and that bipolar stress creates more interface traps than unipolar stress. The interface trap generation under dynamic stress is almost independent of stressing frequency at the region of 104 Hz, while it increases with frequency in the region of 104-106 Hz, and decreases at the frequency beyond 107 Hz. The nitrided SiO2 samples show higher interface trap generation and stronger frequency dependence than the pure SiO2 counterpart.
Keywords
MOSFET; dielectric thin films; electron traps; nitridation; silicon compounds; SiO2; bipolar oxide field stress; dynamic stress; forward-biased gate-controlled-diode measurement; frequency dependence; interface trap generation; n-channel MOSFET; plasma-nitrided SiO2 gate dielectrics; static stress; unipolar oxide field stress; Boron; Dielectrics; Frequency; MOSFETs; Nitrogen; Plasmas; Radiative recombination; Stress; Substrates; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuits Technology, 2004. Proceedings. 7th International Conference on
Print_ISBN
0-7803-8511-X
Type
conf
DOI
10.1109/ICSICT.2004.1436635
Filename
1436635
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