Ultra high frequency static dividers in a narrow mesa InGaAs/InP DHBT technology

Author

Griffith, Z. ; Dahlstrom, M. ; Seo, M. ; Rodwell, M.J.W. ; Urteaga, M. ; Pierson, R. ; Rowell, P. ; Brar, B. ; Lee, S. ; Nguyen, N. ; Nguyen, C.

Author_Institution

Dept. of Electr. & Comput. Eng., California Univ., Santa Barbara, CA, USA

fYear

2004

fDate

31 May-4 June 2004

Firstpage

663

Lastpage

666

Abstract

Static frequency dividers with a maximum clock frequency > 110 GHz were designed and fabricated in a narrow mesa InP/In_0.53Ga_0.47As/InP DHBT technology. Divider operation is fully static, operating from f_clk = 4 GHz to 118.70 GHz and dissipating 686.4 mW of power from a -4.2 Volt supply. The circuit employs single-buffered emitter coupled logic (ECL) and inductive peaking. The transistors have an emitter junction width of 0.5 μm and a collector-to-emitter area ratio of 3.0. A microstrip wiring environment is employed for high interconnect density, and to minimize loss and impedance mismatch at frequencies > 100 GHz.

Keywords

III-V semiconductors; UHF devices; bipolar integrated circuits; emitter-coupled logic; frequency dividers; gallium arsenide; heterojunction bipolar transistors; indium compounds; integrated circuit interconnections; -4.2 V; 0.5 mum; 4 to 118.70 GHz; 686.4 mW; DHBT technology; InP-In_0.53Ga_0.47As-InP; clock frequency; emitter junction; impedance mismatch; inductive peaking; interconnect density; microstrip wiring; single-buffered emitter coupled logic; ultrahigh frequency static dividers; Clocks; Coupling circuits; DH-HEMTs; Frequency conversion; Indium gallium arsenide; Indium phosphide; Integrated circuit interconnections; Logic circuits; Microstrip; Wiring;

fLanguage

English

Publisher

ieee

Conference_Titel

Indium Phosphide and Related Materials, 2004. 16th IPRM. 2004 International Conference on

ISSN

1092-8669

Print_ISBN

0-7803-8595-0

Type

conf

DOI

10.1109/ICIPRM.2004.1442813

Filename

1442813