The SYNC chip in the front-end electronics of the LHCb muon detector

Author

Cadeddu, Sandro ; De Leo, Vincenzo ; Deplano, Caterina ; Fois, Enrico ; Lai, Adriano

Author_Institution

Inst. Nazionale di Fisica Nucl., Cittadella Univ., Monserrato, Italy

Volume

3

fYear

2004

fDate

16-22 Oct. 2004

Firstpage

1386

Abstract

We present a custom integrated circuit, named SYNC, which is a fundamental building block in the front-end architecture of the LHCb muon detector. SYNC is realized in IBM 0.25 mum technology, using radiation hardening layout techniques. Each SYNC integrates the complete front-end L0 stage, consisting of a buffer and a derandomizer and an interface to the L1 stage. It also integrates custom TDCs, one per each input channel, having a time resolution of 1.5 ns. Many monitoring and diagnostic facilities are also integrated on the chip. We describe the circuit architecture, its internal blocks and its main modes of operation.

Keywords

application specific integrated circuits; muon detection; nuclear electronics; radiation hardening (electronics); 0.25 mum; 1.5 ns; IBM technology; L1 stage interface; LHCb muon detector; SYNC chip; buffer; circuit architecture; custom integrated circuit; derandomizer; diagnostic facilities; front-end L0 stage; front-end architecture; front-end electronics; input channel; internal blocks; monitoring facilities; radiation hardening layout techniques; time resolution; Buffer storage; Decoding; Delay; Large Hadron Collider; Mesons; Phase measurement; Radiation detectors; Signal generators; Signal processing; Time measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Nuclear Science Symposium Conference Record, 2004 IEEE

Conference_Location

Rome

ISSN

1082-3654

Print_ISBN

0-7803-8700-7

Electronic_ISBN

1082-3654

Type

conf

DOI

10.1109/NSSMIC.2004.1462499

Filename

1462499