DocumentCode :
437969
Title :
A PCI interface with four 2 Gbit/s serial optical links
Author :
Iwanski, Wieslaw ; Haas, Stafan ; Joos, Markus
Author_Institution :
Henryk Niewodniczanski Inst. of Nucl. Phys., Polish Acad. of Sci., Krakow, Poland
Volume :
3
fYear :
2004
fDate :
16-22 Oct. 2004
Firstpage :
1535
Abstract :
A reconfigurable PCI interface card (FILAR) with four on-board high-speed serial optical links has been developed for application in DAQ and test systems. FILAR cards, installed in low cost PCs, are currently being used in the combined test-beam of the ATLAS experiment at CERN as well as in several laboratory set-ups. The hardware and firmware design of the module and results from performance measurements are presented. The four on-board 2 Gbit/s serial optical links conform to the S-LINK specification and are compatible with the readout link (ROL) implementation for the ATLAS experiment. The board design is largely based on FPGAs and the firmware uses a commercial 64-bit/66 MHz PCI IP core for the bus interface. Different firmware versions were developed which can be used to configure the hardware as either a data source or a destination card. Design optimizations have been made during the development cycle of the firmware to maximize the data throughput and reduce the PCI bus overhead as well as the CPU load. In a PC with multiple PCI bus segments, an aggregate data throughput of over 1.7 Gbyte/s has been measured and transfer rates of more than 100 kHz for 1 Kbyte data fragments have been achieved.
Keywords :
data acquisition; field programmable gate arrays; firmware; high energy physics instrumentation computing; nuclear electronics; optical links; peripheral interfaces; readout electronics; system buses; 2 Gbit/s; ATLAS experiment; CPU load; FILAR cards; FPGA; PCI IP core; PCI bus overhead; S-LINK specification; aggregate data throughput; board design; bus interface; combined test-beam; data acquisition; data fragments; data source; data throughput; design optimizations; destination card; firmware design; firmware versions; hardware design; multiple PCI bus segments; on-board high-speed serial optical links; readout link implementation; reconfigurable PCI interface card; transfer rates; Costs; Data acquisition; Hardware; Laboratories; Measurement; Microprogramming; Optical fiber communication; Personal communication networks; System testing; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nuclear Science Symposium Conference Record, 2004 IEEE
Conference_Location :
Rome
ISSN :
1082-3654
Print_ISBN :
0-7803-8700-7
Electronic_ISBN :
1082-3654
Type :
conf
DOI :
10.1109/NSSMIC.2004.1462532
Filename :
1462532
Link To Document :
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