Challenges to covering the high-level to silicon gap

Silicon architects have a difficult task. They have to translate a high-level product desire into a lower-level description for silicon implementation. They are required to balance their own creativity, project schedule, solution cost, and the degree of difficultly of implementation. Microarchitectural design starts with a high-level premise. For microprocessors, this premise is in the form of an instruction set architectural (ISA) reference, which is usually in book form. The process of interpreting and converting this ISA, for example, into a constructible RTL requires experience, skills, sometimes arrogance and usually needs a lot of luck. Architectural exploration is heavily constrained by experiences and limited by lack of tools and project schedules. This task looks at the whole path from high-level to silicon, look at some of the research along that path and challenge everyone on the important need to cover the micro-architectural exploration gap.