Efficient transient simulation for transistor-level analysis

Author

Zhu, Zhengyong ; Rouz, K. ; Borah, Manashita ; Cheng, Chung-Kuan ; Kuh, Ernest S.

Author_Institution

Dept. of Comput. Sci. & Eng., California Univ., La Jolla, CA, USA

Volume

1

fYear

2005

fDate

18-21 Jan. 2005

Firstpage

240

Abstract

In this paper, we introduce an efficient transistor level simulation tool with SPICE-accuracy for deep-submicron (DSM) VLSI circuits with strong coupling effects. The new approach uses multigrid for large networks of power/ground, clock and signal interconnect. Transistor devices are integrated using a novel two-stage Newton-Raphson method to dynamically model the linear network and nonlinear devices interface. Orders of magnitude speedup over Berkeley SPICE3 is observed for sets of DSM design circuits.

Keywords

Newton-Raphson method; SPICE; VLSI; circuit simulation; integrated circuit modelling; transient analysis; Berkeley SPICE3; DSM design circuits; Newton-Raphson method; coupling effects; deep-submicron VLSI circuits; linear network; nonlinear devices interface; transient simulation; transistor-level analysis; Analytical models; Circuit simulation; Clocks; Computational modeling; Convergence; Coupling circuits; Integrated circuit interconnections; Newton method; Transient analysis; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 2005. Proceedings of the ASP-DAC 2005. Asia and South Pacific

Print_ISBN

0-7803-8736-8

Type

conf

DOI

10.1109/ASPDAC.2005.1466166

Filename

1466166