DocumentCode
438429
Title
An efficient control-oriented coverage metric
Author
Verma, Shireesh ; Ramineni, K. ; Harris, Ian G.
Author_Institution
Center for Embedded Comput. Syst., California Univ., Irvine, CA, USA
Volume
1
fYear
2005
fDate
18-21 Jan. 2005
Firstpage
317
Abstract
Coverage metrics, which evaluate the ability of a test sequence to detect design faults, are essential to the validation process. A key source of difficulty in determining fault detection is that the control flow path traversed in the presence of a fault cannot be determined. Fault detection can only be accurately determined by exploring the set of all control flow paths, which may be traversed as a result of a fault. We present a coverage metric that determines the propagation of fault effects along all possible faulty control flow paths. The complexity of exploring multiple control flow paths is greatly alleviated by heuristically pruning infeasible control flow paths using the algorithm that we present. The proposed coverage metric provides high accuracy in designs that contain complex control flow. The results obtained are promising.
Keywords
fault diagnosis; integrated circuit testing; logic testing; control flow path; control-oriented coverage metric; design fault detection; test sequence; validation process; Circuit faults; Computational complexity; Embedded computing; Error correction; Fault detection; Petroleum; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2005. Proceedings of the ASP-DAC 2005. Asia and South Pacific
Print_ISBN
0-7803-8736-8
Type
conf
DOI
10.1109/ASPDAC.2005.1466181
Filename
1466181
Link To Document