DocumentCode :
438448
Title :
Dynamic symmetry-breaking for improved Boolean optimization
Author :
Aloul, Fadi A. ; Ramani, Arathi ; Markov, Igor L. ; Sakallah, Karem A.
Author_Institution :
Dept. of Comput. Eng., American Univ. of Sharjah, United Arab Emirates
Volume :
1
fYear :
2005
fDate :
18-21 Jan. 2005
Firstpage :
445
Abstract :
With impressive progress in Boolean satisfiability (SAT) solving and several extensions to pseudo-Boolean (PB) constraints, many applications that use SAT, such as high-performance formal verification techniques are still restricted to checking satisfiability of certain conditions. However, there is also frequently a need to express a preference for certain solutions. Extending SAT-solving to Boolean optimization allows the use of objective functions to describe a desirable solution. Although recent work in 0-1 integer linear programming (ILP) offers extensions that can optimize a linear objective function, this is often achieved by solving a series of SAT or ILP decision problems. Our work articulates some pitfalls of this approach. An objective function may complicate the use of any symmetry that might be present in the given constraints, even when the constraints are unsatisfiable and the objective function is irrelevant. We propose several new techniques that treat objective functions differently from CNF/PB constraints and accelerate Boolean optimization in many practical cases. We also develop an adaptive flow that analyzes a given Boolean optimization problem and picks the symmetry-breaking technique that is best suited to the problem characteristics. Empirically, we show that for non-trivial objective functions that destroy constraint symmetries, the benefit of static symmetry-breaking is lost but dynamic symmetry-breaking accelerates problem-solving in many cases. We also introduce a new objective function, localized bit selection (LBS), that can be used to specify a preference for bit values in formal verification applications.
Keywords :
Boolean functions; computability; formal verification; integer programming; linear programming; 0-1 integer linear programming; Boolean optimization; Boolean satisfiability solving; CNF/PB constraints; SAT solving; decision problems; dynamic symmetry breaking; formal verification; linear objective function; localized bit selection; pseudo-Boolean constraints; Acceleration; Automatic test pattern generation; Constraint optimization; Encoding; Field programmable gate arrays; Formal verification; Lead; Microprocessors; Problem-solving; Routing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2005. Proceedings of the ASP-DAC 2005. Asia and South Pacific
Print_ISBN :
0-7803-8736-8
Type :
conf
DOI :
10.1109/ASPDAC.2005.1466204
Filename :
1466204
Link To Document :
بازگشت