• DocumentCode
    438451
  • Title

    Hierarchical analysis of process variation for mixed-signal systems

  • Author

    Liu, Fang ; Ozev, Sule

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Duke Univ., Durham, NC, USA
  • Volume
    1
  • fYear
    2005
  • fDate
    18-21 Jan. 2005
  • Firstpage
    465
  • Abstract
    Increasing process variability necessitates reliable analysis of its effects on circuit performance not only at the top level but also at intermediate levels. Mixed-signal circuits with multiple hierarchical layers, multiple parameters, and complex functional relations are especially susceptible to such variations. In this paper, we present a hierarchical method for process variation analysis. The ability to compute the variance of parameters at each hierarchical layer makes the method particularly suited for helping designers through design iterations. Experimental results indicate that the proposed method achieves high computational efficiency with up to 2% compromise in accuracy even for highly nonlinear functional relations.
  • Keywords
    integrated circuit design; mixed analogue-digital integrated circuits; network analysis; process design; design iterations; hierarchical analysis; hierarchical layer; mixed-signal circuits; mixed-signal systems; nonlinear functional relations; process variability; process variation analysis; Circuit optimization; Circuit simulation; Circuit testing; Computational modeling; Control systems; Manufacturing; Monte Carlo methods; Performance analysis; Process control; Tolerance analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2005. Proceedings of the ASP-DAC 2005. Asia and South Pacific
  • Print_ISBN
    0-7803-8736-8
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2005.1466208
  • Filename
    1466208