A 15-bit 2 MHz Nyquist rate Δ Σ ADC in a 1 µm CMOS technology

A high-resolution high-speed fourth order cascaded delta-sigma modulator, based on a 2-1-1 structure, is presented. The modulator is implemented with fully differential switched capacitor circuits in a standard 1 µm CMOS technology. The converter is powered by a single 5 V supply, uses two symmetrical reference voltages of 1 V, and is driven by a single 48 MHz clock. With an oversampling ratio of only 24 the converter achieves 91 dB of resolution, a peak SNR of 90 dB, and a peak SNDR of 85 dB at a Nyquist rate of 2 MHz after comb-filtering. The power consumption of the converter is 230 mW.