DocumentCode
439247
Title
A 0.9V 960MHz CMOS radio front end employing a doubly balanced transconductance mixer
Author
Xavier, Bernard A. ; Sullivan, Patrick J. ; Fransis, Bert ; Ku, Walter
Author_Institution
Hughes Network Systems, San Diego, CA, USA
fYear
1997
fDate
16-18 Sept. 1997
Firstpage
404
Lastpage
407
Abstract
A 960MHz CMOS low voltage radio front end architecture is presented. The circuit employs a doubly balanced transconductance mixer. The radio front end achieves a power gain of 6dB, an input referred third order intercept (IIP3) of -3dBm and single sideband noise figure of 11 dB at 0.9V supply voltage and 20mW power dissipation. The circuit is realised in 0.6µn CMOS technology; it occupies an area of 1mm × 0.7mm.
Keywords
CMOS technology; Capacitors; Circuit topology; Inductors; Joining processes; Local oscillators; MOSFETs; RF signals; Radio frequency; Transconductance;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1997. ESSCIRC '97. Proceedings of the 23rd European
Conference_Location
Southampton, UK
Type
conf
Filename
1470949
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