A 0.7 µm CMOS 1Gb/s optical receiver with rail-to-rail output swing

A 1 Gb/s optical receiver realized in a standard 0.7µm CMOS technology is presented. The receiver consists of a 1 kΩ transimpedance amplifier followed by a postamplifier which amplifies the signal to a full rail-to-rail output voltage. The postamplifier is biased by an offset tolerant replica biasing circuit with accurate threshold control. Except from a photodiode, no external components or biasing voltages are required to operate the receiver. The power consumption of the complete receiver including all biasing is 100 mW from a single 5 V supply. At 3.3 V, 26.5 mW is consumed for 600 Mb/s.