DocumentCode :
439317
Title :
A low power quadrature direct digital frequency synthesizer using non-linear resistor string DACs
Author :
Mortezapour, S. ; Edward K.F.Lee
Author_Institution :
Iowa State University, Ames, Iowa, USA
fYear :
1998
fDate :
22-24 Sept. 1998
Firstpage :
348
Lastpage :
351
Abstract :
A quadrature direct digital frequency synthesizer (DDFS) was designed and implemented in a 1.2 µm CMOS process using two non-linear resistor string DACs. These DACs are used in place of the phase-to-amplitude ROM look-up tables and the linear DACs in a conventional quadrature DDFS to give a low power design. At 25 MHz clock frequency, the DDFS dissipates less than 4 mW at 3.3 V and has SFDR better than 55 dBc at low synthesized frequencies.
Keywords :
CMOS technology; Clocks; Communication switching; Frequency synthesizers; Logic circuits; Phase locked loops; Power dissipation; Read only memory; Resistors; Table lookup;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1998. ESSCIRC '98. Proceedings of the 24th European
Conference_Location :
The Hague, The Netherlands
Type :
conf
DOI :
10.1109/ESSCIR.1998.186280
Filename :
1471037
Link To Document :
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