Title :
A 100MHz partial analog adaptive equalizer for use in wired data transmission
Author :
Cheng, Jasmine ; Johns, D.A.
Abstract :
This paper describes a 3 volt partial analog adaptive equalizer that is intended to be used with a digital decision feedback equalizer (DFE). The analog filter was realized in a 0.5µm CMOS process and has a bandwidth of 100MHz while consuming 23mW of power. It has one tuning parameter and eliminates precursor intersymbol interference in a 311 Mbits/second system encoded as a 4-level PAM signal over 0 to 300 meters of coaxial cable.
Keywords :
Adaptive equalizers; Bandwidth; CMOS process; Coaxial cables; Data communication; Decision feedback equalizers; Filters; Intersymbol interference; Power cables; Power system modeling;
Conference_Titel :
Solid-State Circuits Conference, 1999. ESSCIRC '99. Proceedings of the 25th European
Conference_Location :
Duisburg, Germany