DocumentCode
439388
Title
An 8-bit low-voltage pipelined ADC utilizing switched-opamp technique
Author
Waltari, M. ; Halonen, K.
Author_Institution
Helsinky University of Technology, Finland
fYear
1999
fDate
21-23 Sept. 1999
Firstpage
174
Lastpage
177
Abstract
A low-voltage 8-bit pipelined analog-to-digital converter employing the switched-opamp technique is presented. The developed low-voltage circuit blocks include a fully differential switched-opamp, a multiplying digital-to-analog converter (MDAC), a comparator and a front-end input buffer. The circuit is implemented in a standard 0.5 µm CMOS process. According to measurements the circuit achieves a 44.7 dB peak SNDR at 8 MHz clock rate. The circuit operates with supply voltages down to 1.0 V
Keywords
Boosting; Capacitors; Electronic circuits; Laboratories; Pipelines; Switches; Switching circuits; Tellurium; Threshold voltage; Variable structure systems;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1999. ESSCIRC '99. Proceedings of the 25th European
Conference_Location
Duisburg, Germany
Type
conf
Filename
1471124
Link To Document