A 1.5 V, 30 Msps, 9- to 10-bit equivalent current-mode CMOS sample-and-hold circuit

A new video-speed, current-mode, CMOS, sample-and-hold circuit has been developed. It operates with a supply voltage as low as 1.5 V and a signal-to-noise ratio (S/N) of 57 dB and 54 dB at clock frequencies of 20 MHz and 30 MHz. It consists of current mirror circuits with an analog switch and a capacitor placed in differential form to achieve high accuracy without being affected by the switch feed-through error. Voltages at the input and the output terminals of the current mirror circuit are kept constant to obtain precise current matching. The circuit was fabricated using 0.6 µm MOS devices with normal threshold voltages (Vth) of +07 V (NMOS) and -0.7 V (PMOS).