A 250MHz low voltage swing bus driver for embedded memory logic

This paper presents a 250 MHz low voltage swing bus driver with a new FCSR(Feedback Control Swing Reduction) scheme. The proposed driver controls the bus swing voltage within a few hundreds of mV, and dissipates only 1/4 of power compared to GTL. The proposed FSCR can effectively reduce power dissipations in embedded memory and logic which has wide buses between DRAM and logic. The sizes of FCSR driver have been decided by the analytical model which agrees with SPICE simulations within 5% error. The effects of slew rate of voltage swing on the crosstalk among buses have been also analyzed quantitatively.