Title :
Measurements and analysis of PLL jitter caused by digital switching noise
Author_Institution :
Bell Labs, Lucent Technologies, Holmdel, NJ
Abstract :
Substrate coupling between a noise-generating digital circuit and analog PLL´s realized in a standard low-resistivity substrate 0.25µm CMOS process is analyzed. It is found that the main source of jitter strongly depends on the power supply configuration of the PLL.
Keywords :
Bandwidth; Delay; Filters; Jitter; Mutual coupling; Noise generators; Noise measurement; Phase locked loops; Power supplies; Voltage-controlled oscillators;
Conference_Titel :
Solid-State Circuits Conference, 2000. ESSCIRC '00. Proceedings of the 26rd European
Conference_Location :
Stockholm, Sweden
