Title :
Low power column ADC for CMOS imagers
Author :
Van Der Avoird, André ; Vertregt, Maarten
Author_Institution :
Philips Research Laboratories, Eindhoven, NL
Abstract :
Since most CMOS imagers read out large pixel sets (e.g. lines) at the same time, we can choose a level of parallelism to do analog to digital conversion (ADC). This paper presents the design, simulation and measurement results of a 10 bit fully parallel ADC in a 0.35µ process, taking 1 mm2and 7 mW to convert 50 VGA images per second.
Keywords :
Costs; Counting circuits; Image converters; Joining processes; Laboratories; Pixel; Prototypes; Signal generators; Switches; Synchronization;
Conference_Titel :
Solid-State Circuits Conference, 2000. ESSCIRC '00. Proceedings of the 26rd European
Conference_Location :
Stockholm, Sweden
