An 8-bit, 1-Gsample/s folding-interpolating analog-to-digital converter

This paper deals with the design and implementation of an 8-bit, 1-Gsample/s folding-interpolating analog-to-digital converter using a conventional 0.5µm self-aligned, double polysilicon bipolar process with maximum unity gain cutoff frequency fTof 25GHz. The high-speed and high-resolution A/D converter has applications in direct IF sampling receivers for wideband communications systems. The converter occupies an area of 2.5mm×3.5mm including bonding pads and exhibits a better than 7-bit ENOB with an input signal frequency of 200MHz and at a sampling rate of 1-Gsample/s. The maximum power dissipation of the ADC is 2.5W using a 5V power supply.