An 18-mW 2.5-GHz/900-MHz BiCMOS dual frequency synthesizer with < 10-Hz RF carrier resolution

A 2.5-GHz/900-MHz dual fractional-N/integer-N frequency synthesizer is implemented in 0.35-µm, 25-GHz BiCMOS. A ΔΣ fractional-N synthesizer is employed for RF channels to have agile switching, low in-band noise and fine resolution. An on-chip voltage regulator is designed to reduce digital power and substrate noise. The in-band noise of -82 dBc/Hz with 35-kHz loop bandwidth is achieved at 2.47 GHz with less than 10-Hz frequency resolution. The prototype dual synthesizer consumes 18 mW with 2.6-V supply.