DocumentCode
439536
Title
A 2.7 V, 8 GHz monolithic I/Q RC oscillator with active inductive loads
Author
van der Tang, Johan ; Kasperkovitz, Dieter ; Centurelli, Francesco ; van Roermund, Arthur
Author_Institution
Eindhoven University of Technology, The Netherlands
fYear
2000
fDate
19-21 Sept. 2000
Firstpage
332
Lastpage
335
Abstract
A new SHF RC I/Q oscillator architecture is presented which is derived from a two-integrator architecture. By using active inductive loads, a high maximum operating frequency is achieved. Automated circuit optimization shows that a maximum oscillation frequency of 20 GHz can be achieved in a 30 GHz ft process. The presented I/Q RC architecture is implemented in a 30 GHz ft BiCMOS process. The Carrier to Noise Ratio (CNR) has been optimized by adding small capacitors which reduces the maximum frequency but maximizes the signal swing. Measured tuning range is 6.5 GHz to 8 GHz. A CNR of more than 96 dBc/Hz at 2 MHz offset of the carrier is measured with a VCO core dissipation of 76 mW. The operating voltage is 2.7 V and the active chip area is 0.13 mm2.
Keywords
BiCMOS integrated circuits; Capacitors; Circuit noise; Circuit optimization; Frequency; Noise reduction; Oscillators; Semiconductor device measurement; Signal to noise ratio; Tuning;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2000. ESSCIRC '00. Proceedings of the 26rd European
Conference_Location
Stockholm, Sweden
Type
conf
Filename
1471279
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