Title :
Nonvolatile CMOS latch employing GMR resistors
Author :
Das, Bodhisattva ; Wong, Kae Ann ; Black, William C., Jr.
Author_Institution :
Iowa State University, Ames, Iowa, USA
Abstract :
A nonvolatile latch has been demonstrated using Giant-Magneto-Resistance (GMR) thin film resistors placed atop a conventional .35µm bulk CMOS process. The latch employs two GMR resistors that are programmed in complementary states by a pulse of 20- 50mA current passing through metal lines placed immediately below the resistors. Sensing of the relative resistor values is accomplished via a cross-coupled inverter sense-amplifier that consumes zero quiescent power after regeneration and that may also be used as a conventional SRAM cell. Preliminary experimental results indicate that sensing may be accomplished in <40nsec. with a current during reading of about 420 µA. Total die size of the latch is about 248×57 sq. microns.
Keywords :
CMOS process; Circuits; EPROM; Latches; Magnetic devices; Magnetic domains; Magnetic films; Magnetic moments; Nonvolatile memory; Resistors;
Conference_Titel :
Solid-State Circuits Conference, 2000. ESSCIRC '00. Proceedings of the 26rd European
Conference_Location :
Stockholm, Sweden