• DocumentCode
    439624
  • Title

    A 100Mb/s, 2.8V CMOS current-mode analogue Viterbi decoder

  • Author

    Demosthenous, Andreas ; Taylor, John

  • Author_Institution
    University College London, London, United Kingdom
  • fYear
    2001
  • fDate
    18-20 Sept. 2001
  • Firstpage
    233
  • Lastpage
    236
  • Abstract
    We describe a K = 3, rate-1/2 analogue Viterbi decoder fabricated in 0.8µm CMOS technology, intended for convolutional decoding applications. The decoder is the first of its kind to employ current-mode analogue circuit techniques. It operates at data rates of at least 100Mb/s and consumes 40mW at that rate from a single 2.8V power supply. The chip contains about 6K transistors of which less than 1K are used in the analogue sections of the system and has a core area of approximately 1mm2.
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2001. ESSCIRC 2001. Proceedings of the 27th European
  • Conference_Location
    Villach, Austria
  • Type

    conf

  • Filename
    1471376