DocumentCode :
439702
Title :
Nanoscale system design challenges: Business as usual?
Author :
De Man, Hugo J.
Author_Institution :
K.U.Leuven/IMEC, Leuven, Belgium
fYear :
2002
fDate :
24-26 Sept. 2002
Firstpage :
3
Lastpage :
10
Abstract :
While process technologists are obsessed to pursue Moore´s curve down to nanoscale dimensions, design technologists are confronted with gigascale complexity. On the other hand, post-PC products require zero cost, zero energy yet software programmable novel system architectures to be sold in huge volumes and be designed in exponentially decreasing time. How do we cope with these novel silicon architectures? What challenges in research does this create? How to create the necessary tools and skills and how to organise research and education in a world driven by shareholders value?
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2002. ESSCIRC 2002. Proceedings of the 28th European
Conference_Location :
Florence, Italy
Type :
conf
Filename :
1471460
Link To Document :
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