DocumentCode
439811
Title
A 0.7dB insertion loss CMOS-SOI antenna switch with more than 50dB isolation over the 2.5 to 5GHz band
Author
Tinella, C. ; Fournier, J.M. ; Belot, D. ; Knopik, V.
Author_Institution
IMEP, Grenoble-Cedex, France
fYear
2002
fDate
24-26 Sept. 2002
Firstpage
483
Lastpage
486
Abstract
Taking full advantage of the high resistivity substrate and underlying oxide of SOI technology, a high performance CMOS SPDT T/R switch has been designed and fabricated in a partially depleted, 0.25µm SOI process. The targeted Bluetooth class II specifications have been fully fitted. The switch over the high resistivity substrate exhibits a 0.7dB insertion loss and a 50dB isolation at 2.4GHz; at 5GHz insertion loss and isolation are 1dB and 47dB respectively. The measured ICP1dBis +12dBm.
Keywords
Bluetooth; CMOS process; CMOS technology; Conductivity; Insertion loss; Isolation technology; Radio frequency; Silicon on insulator technology; Substrates; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2002. ESSCIRC 2002. Proceedings of the 28th European
Conference_Location
Florence, Italy
Type
conf
Filename
1471570
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