A low noise switched-capacitor interface circuit for sub-micro gravity resolution micromachined accelerometers

This paper presents a switched-capacitor interface circuit for force-rebalanced micromachined capacitive accelerometers. Electrical noise sources of the system were analyzed extensively and the circuit noise was improved by increasing the operating frequency and optimizing the critical circuit blocks. The circuit operates as a 2nd order electromechanical Σ-Δ converter together with the accelerometer. It includes an on-chip clock generator, safe start-up and digital compensation circuits. The interface chip operates from 1MHz clock and provides an adjustable sensitivity between 0.2 and 1.2 V/pF. It can resolve capacitance differences less than 20aF on top of more than 30pF base capacitance with a dynamic range up to 140dB. This chip dissipates 7.2mW from a single 5V supply, and occupies 1.8×1.9mm²in 0.5µm CMOS process.