A novel multi-bit parallel Δ Σ FM-to-digital converter with 24-bit resolution

This paper describes a multi-bit ΔΣ FM-to-digital converter (FDC) combining 1024 first-order AE modulators in parallel to increase the signal to quantization-noise ratio (SQNR). This parallelization technique is totally new and according to theory, the SQNR is increased by 6 dB per doubling of number of modulators. The proposed circuit is an extension of the existing frequency delta sigma modulator (FDSM)-concept. The FDSM-concept is based on a ΔΣ-modulator with no global feedback and thus no need for a feedback DAC, which makes multi-bit conversion straight forward. Theoretical discussions and circuit simulation are presented along with measured results from a 24-bit parallel FDC which has been implemented in a standard 0.6µm CMOS process from Austria Micro Systeme AG (AMS). For a 150 Hz bandwidth the measured SQNR is 146 dB with a clock frequency of 20 MHz.