DocumentCode :
439861
Title :
A high-speed, high-bandwidth, low resolution flash ADC for radio astronomy applications
Author :
Deschans, D. ; Begueret, J. ; Deval, Y. ; Scarabello, C. ; Fouillat, P. ; Montignac, G. ; Baudry, A.
Author_Institution :
University of Bordeaux, France
fYear :
2002
fDate :
24-26 Sept. 2002
Firstpage :
691
Lastpage :
694
Abstract :
In this paper, the design details and dynamic tests of a high-speed sampler (ADC or digitizer) are reported. Monolithic digitizer is implemented in a BiCMOS 0.35µm SiGe processes. The features of this ADC are a clock rate of 4 GHz with 3 quantization levels and an input -0.5 dB bandwidth from 2 GHz up to 4 GHz. The adopted architecture for the design of a 2 bits digitizer is that of a conventional flash analog to digital converter structure. The overall chip dissipates 652 mW under 2.5 V supply and the die area is 5.4 mm2.
Keywords :
Bandwidth; BiCMOS integrated circuits; CMOS technology; Clocks; Correlators; Frequency; Germanium silicon alloys; Radio astronomy; Receiving antennas; Silicon germanium;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2002. ESSCIRC 2002. Proceedings of the 28th European
Conference_Location :
Florence, Italy
Type :
conf
Filename :
1471621
Link To Document :
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