• DocumentCode
    439866
  • Title

    A 10 bit, low power, digitally auto-zeroed CMOS analogue to digital converter core for the NASA TRIO smart sensor system on a chip

  • Author

    Kottaras, G. ; Paschalidis, N. ; Stamatopoulos, N. ; Paschalidis, V. ; Karadamoglou, K. ; Sarris, E.

  • Author_Institution
    Demokritos University of Thrace, Xanthi, Greece
  • fYear
    2002
  • fDate
    24-26 Sept. 2002
  • Firstpage
    711
  • Lastpage
    714
  • Abstract
    In spacecraft applications there is a great need for robust analogue to digital converters (ADC) that can withstand the harsh space environment. Commercially available ADCs can not operate in space due to radiation effects. We present an ADC that has been developed for the NASA TRIO smart sensor system on a chip (SoC), a versatile low power device specifically designed for spacecraft data acquisition and telemetry of several sensors such as temperature, voltage/current transducers, radFETs, etc. A key element of the TRIO chip is the ADC, which is required to operate in excess of 500Krad ionising dose and to be robust to single event upsets. The topology chosen is simple with a special auto-zeroing technique to compensate for offset errors. The ADC has 10-bit resolution for a reference in the range 0.1V to Vdd + 1V, and for power supply in the range 2.5 V to 5.5 V. The power dissipation is ∼2mW at 40Ksamlles/sec. The TRIO chip is used in several spacecraft including Contour, Messenger, Europa, Pluto, etc.
  • Keywords
    Analog-digital conversion; Data acquisition; Intelligent sensors; NASA; Radiation effects; Robustness; Space vehicles; System-on-a-chip; Telemetry; Temperature sensors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2002. ESSCIRC 2002. Proceedings of the 28th European
  • Conference_Location
    Florence, Italy
  • Type

    conf

  • Filename
    1471626