Title :
A new CMOS 4Q-multiplier using linear and saturation regions complementally
Author :
Suzuki, T. ; Oura, T. ; Yoneyama, T. ; Asai, H.
Author_Institution :
Shizuoka University
Abstract :
A New Four-Quadrant (4Q) Multiplier complementally using linear and saturation regions of MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is proposed. This multiplier operates in the region except for threshold voltage VTto zero, using a novel non-linearity cancellalion method. The validity of proposed circuit is confirmed through HSPICE simulation.
Keywords :
Circuit simulation; Computational modeling; Computer networks; FETs; Filters; MOSFET circuits; Neural networks; Signal processing; Systems engineering and theory; Threshold voltage;
Conference_Titel :
Solid-State Circuits Conference, 2002. ESSCIRC 2002. Proceedings of the 28th European
Conference_Location :
Florence, Italy
