Title :
Fast algorithm for clock grid simulation
Author :
Sotiriadis, P. ; Franza, O. ; Bailey, D.W. ; Calhoun, B. ; Lin, D. ; Chandrakasan, A.
Author_Institution :
Massachusetts Inst. of Technology, Cambridge, MA
Abstract :
A fast and reliable design tool for real-time simulation of clock grids is presented here. Its implementation is orders of magnitude faster than SPICE, which makes it well-suited for the analysis of a multitude of design options early in a project. The mathematical formulation fully models a regular RLC clock grid with arbitrarily located loads and input sources. The algorithm is validated using numerical data and SPICE simulated skew numbers from the Alpha 21364 microprocessor.
Conference_Titel :
Solid-State Circuits Conference, 2002. ESSCIRC 2002. Proceedings of the 28th European
Conference_Location :
Florence, Italy
