DocumentCode :
439889
Title :
A fractional-N frequency synthesizer with a 3-bit 4thorder Σ-Δ modulator
Author :
Kun-Seok Lee ; Jung-hyen Lee ; Min Jong Yoh ; Byeong-Ha Park
Author_Institution :
Samsung Electronics, Korea
fYear :
2002
fDate :
24-26 Sept. 2002
Firstpage :
803
Lastpage :
806
Abstract :
A fractional-N frequency synthesizer in a 0.5-µm BiCMOS technology is presented. A 3-bit 4th order Σ-Δ modulator employs an interpolative architecture with multiple feedback paths and metal-connected multipliers to implement the feedback coefficients, resulting in a simple hardware complexity, lower out-of-band phase noise, a frequency resolution of less than 10-Hz, and agile switching time. The experimental results show - 73dBc/Hz in-band phase noise and -142dBc/Hz out-of-band phase noise at 1MHz offset frequency. The fractional spurs are less than -80dBc/Hz at 200KHz offset frequency and the reference spur is -87dBc/Hz. The proposed synthesizer consumes 5.5mA from a single 3-V supply voltage and meets the requirements of most RF applications.
Keywords :
Acoustical engineering; Bandwidth; BiCMOS integrated circuits; Channel spacing; Frequency selective surfaces; Frequency synthesizers; Phase frequency detector; Phase modulation; Phase noise; Radio frequency;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2002. ESSCIRC 2002. Proceedings of the 28th European
Conference_Location :
Florence, Italy
Type :
conf
Filename :
1471649
Link To Document :
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