مرکز منطقه ای اطلاع رساني علوم و فناوري - Gate Stack Optimisation for Advanced CMOS Process

DocumentCode :

440270

Title :

Gate Stack Optimisation for Advanced CMOS Process

Author :

Kubicek, S. ; Vandenberghe, G. ; Schaekers, M. ; Kold´yaev, V. ; Jansen, P. ; Badenes, G. ; Deferm, L. ; De Meyer, K. ; Kerr, D. ; Naem, A.

Author_Institution :

IMEC, Leuven, Belgium

Volume :

fYear :

1999

fDate :

13-15 Sept. 1999

Firstpage :

412

Lastpage :

415

Keywords :

CMOS process; CMOS technology; Capacitors; Chemical technology; Dielectrics; Isolation technology; Lithography; MOS devices; MOSFETs; Temperature;

fLanguage :

English

Publisher :

ieee

Conference_Titel :

Solid-State Device Research Conference, 1999. Proceeding of the 29th European

Conference_Location :

Leuven, Belgium

Print_ISBN :

2-86332-245-1

Type :

conf

Filename :

1505527

Link To Document :