Sampling jitter and power supply interference in current-steering D/A converters

Author

Kosunen, Marko ; Halonen, Kari

Author_Institution

Lab. for Electron. Circuit Design, Helsinki Univ. of Technol., Espoo, Finland

Volume

1

fYear

2005

fDate

28 Aug.-2 Sept. 2005

Abstract

In this paper, the effect of jitter due to code dependent clock load and power-rail interference on the spectral performance of a current-steering D/A converter is discussed. Code dependent jitter increases the amount of harmonic distortion at the converter output. The effect of jitter becomes more dominant as the sampling rate of the converter increases, and may become the most dominant source of nonlinearity in high-speed converters. Effect of the jitter caused by code-dependent clock loading and power-rail interference on the spurious-free dynamic range (SFDR) and total jitter energy of a converter is analyzed with a mathematical jitter model.

Keywords

current-mode circuits; digital-analogue conversion; distortion; nonlinear network synthesis; timing jitter; code dependent clock load; code dependent jitter; current-steering DA converters; harmonic signal distortion; mathematical jitter model; nnlinear high-speed converters; power supply interference; power-rail interference; sampling jitter; sampling rate; spectral performance; spurious-free dynamic range; total jitter energy; Cause effect analysis; Clocks; Current supplies; Dynamic range; Harmonic distortion; Interference; Jitter; Mathematical model; Power supplies; Sampling methods;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuit Theory and Design, 2005. Proceedings of the 2005 European Conference on

Print_ISBN

0-7803-9066-0

Type

conf

DOI

10.1109/ECCTD.2005.1522971

Filename

1522971