DocumentCode :
440468
Title :
Partitioning large circuits to speed up numerical simulations
Author :
Brambilla, Angelo ; Gajani, Giancarlo Storti ; Premoli, Amedeo
Author_Institution :
Dipt. di Elettronica e Informazione, Politecnico di Milano, Italy
Volume :
2
fYear :
2005
fDate :
28 Aug.-2 Sept. 2005
Abstract :
This paper presents a circuit partitioner that improves efficiency in the solution of medium and large size circuits mainly composed of MOSFETs. The peculiarity of the circuit partitioner is to exploit topological properties of elements composing the circuit, in particular their "unidirectionality".
Keywords :
MOSFET circuits; circuit simulation; matrix algebra; network analysis; network topology; MOSFET circuits; circuit partitioner; circuit topology; circuit unidirectionality; large circuit partitioning; numerical simulation speed up; Analog circuits; Circuit simulation; Computational modeling; Computer performance; Costs; Equations; Inverters; MOSFETs; Numerical simulation; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuit Theory and Design, 2005. Proceedings of the 2005 European Conference on
Print_ISBN :
0-7803-9066-0
Type :
conf
DOI :
10.1109/ECCTD.2005.1522988
Filename :
1522988
Link To Document :
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