Title :
A high speed scalable shift-register based on-chip serial communication design for SoC applications
Author :
Wey, I-Chyn ; Chen, You-Gang ; Wu, Chia-Tsun ; Wang, Wei ; Wu, An-Yeu
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
In this paper, a high-speed, scalable on-chip serial transmission design is proposed to provide 2Gb/s transmission bandwidth for SoC applications. By using the dynamic control technology and the single-phase pulse-triggered TSPC shift register design, we can provide high-speed on-chip serial transmission. Moreover, the shift register design is a scalable design. By using the proposed method, we can provide 3 times wider bandwidth as compared to the prior art design (Kimura et al., 2003).
Keywords :
integrated circuit design; shift registers; system-on-chip; dynamic control technology; high-speed scalable shift-register; on-chip serial communication design; system-on-chip application; transmission bandwidth; Bandwidth; Circuits; Clocks; Communication system control; Design engineering; Ring oscillators; Shift registers; System-on-a-chip; Transmitters; Wire;
Conference_Titel :
Research in Microelectronics and Electronics, 2005 PhD
Print_ISBN :
0-7803-9345-7
DOI :
10.1109/RME.2005.1543012
