DocumentCode :
44568
Title :
vCache: Providing a Transparent View of the LLC in Virtualized Environments
Author :
Daehoon Kim ; Hwanju Kim ; Jaehyuk Huh
Author_Institution :
Comput. Sci. Dept., KAIST, Daejeon, South Korea
Volume :
13
Issue :
2
fYear :
2014
fDate :
July-Dec. 19 2014
Firstpage :
109
Lastpage :
112
Abstract :
Since most of the current multi-core processors use a large last-level cache (LLC), efficient use of an LLC is critical for the overall performance of multi-cores. To improve the caching efficiency, page coloring is a representative software-based approach to allow the OS to control placement of pages on an LLC to improve their cache utility and to avoid conflicts among cores. However, system virtualization, with additional address translation by the hypervisor, can make page coloring techniques used by the guest OS ineffective, as guest physical addresses used by the guest OS for coloring differ from real addresses used for cache indexing in the LLCs. In this paper, we propose a novel LLC architecture to provide the guest OS with a flexible control over LLC placement in virtualized systems. The proposed vCache architecture can preserve coloring information set by the guest OS. In addition to color preservation, vCache can potentially eliminate the traditional limitation of page coloring, the cost of dynamic color changes for memory pages. By using the pollute buffer mechanism, one of the color-based cache optimization techniques, vCache shows performance improvement of benchmark applications up to 33% without degrading the performance of another co-running application in the VM.
Keywords :
cache storage; multiprocessing systems; operating systems (computers); paged storage; virtual machines; virtualisation; LLC architecture; LLC placement; VM; address translation; benchmark applications; buffer mechanism; cache indexing; cache utility improvement; caching efficiency improvement; co-running application; color-based cache optimization techniques; coloring information preservation; core conflict avoidance; dynamic color cost; guest OS; guest physical address; hypervisor; last-level cache; memory pages; multicore processor performance; page coloring; page placement control; software-based approach; system virtualization; transparent LLC view; vCache architecture; virtual machines; virtualized environments; Cache storage; Memory management; Multicore processing; Virtual machine monitors; Virtualization; B.3.2.b Cache memories; C.1.4.e Multi-core/single-chip multiprocessors; C.1.5.e Memory hierarchy; Cache partitioning; Page coloring; Virtualization;
fLanguage :
English
Journal_Title :
Computer Architecture Letters
Publisher :
ieee
ISSN :
1556-6056
Type :
jour
DOI :
10.1109/L-CA.2013.20
Filename :
6560059
Link To Document :
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