Title :
Network on chip using a reconfigurable platform
Author :
Sun, Li Ping ; El Mostapha, Aboulhamid ; David, Jean-Pierre
Author_Institution :
Univ. de Montreal, Que.
Abstract :
This paper describes the design and FPGA implementation of a 3-dimensional hypercube multiprocessor network embedding 7 Xilinx MicroBlaze soft processors and one ARM7TDMI hard processor. The MicroBlaze network is synthesized in a XCV2000E FPGA (Xilinx). The whole system is running on the CMC rapid prototyping platform. C language has been used to implement and test a parallel version of the "sort and merge" algorithm. Preliminary results show that the computation time can be reduced by a factor 3 when using 4 processors
Keywords :
C language; field programmable gate arrays; hypercube networks; integrated circuit design; network-on-chip; reconfigurable architectures; software prototyping; 3D hypercube multiprocessor network; C language; FPGA implementation; hard processor; network on chip; rapid prototyping; reconfigurable platform; soft processors; Control systems; Field programmable gate arrays; Hypercubes; Network-on-a-chip; Prototypes; Random access memory; Read only memory; Read-write memory; Reconfigurable logic; Registers;
Conference_Titel :
Circuits and Systems, 2003 IEEE 46th Midwest Symposium on
Conference_Location :
Cairo
Print_ISBN :
0-7803-8294-3
DOI :
10.1109/MWSCAS.2003.1562412
